|
In a
bus architecture, all CPUs share the same communications
path to all of memory. As each CPU gets busier, and as the number
of CPUs increases, many CPUs are "stalled," waiting to read or write
to memory. This translates to increased response time to users and
lower throughput for the system. Increasing the speed of the bus
does improve the performance, but in the systems of the future,
with dozens or hundreds of faster CPUs, switch technology is needed
to provide a balanced system.
In a
switch architecture, you have multiple concurrent
two-way communication paths between CPUs, and between CPUs and memory.
These paths are point to point (not shared) and there are more of
them, therefore CPUs spend less time waiting for data transfer to
and from memory. Data stays in continuous motion, eliminating contention
for system bus resources and delivering ultimate application performance.
User response time remains flatter and more predictable, system
throughput is higher, and the overall system scales as the number
of CPUs increases.
The HP AlphaServer DS20 features a switch-based architecture
that delivers unmatched CPU-to-memory bandwidth of 5.2 GB/sec (peak).
|
